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| HV2731 16-Channel (2 Banks of 8-Channels), High Voltage, Analog Switch With Bleed Resistors Features HVCMOS(R) technology for high performance 220V operating conditions 22 typical output on-resistance Integrated bleed resistors on the outputs 3.3V and 5.0V CMOS logic compatibility Very low quiescent power dissipation (-10A) -45dB min off isolation at 7.5MHz Low parasitic capacitance Excellent noise immunity Flexible operating supply voltages 48-lead LQFP package General Description The Supertex HV2731 is a 220V, 16-channel, high voltage, analog switch integrated circuit (IC) with output bleed resistors (RINT). The output switches are configured as 2 sets of 8 single pole, single throw analog switches. The IC is intended to be used in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging. The 2 sets of 8 analog switches are controlled by 2 input logic controls, DIN1 and DIN2. A logic high on DIN1 will turn on switches 0 to 7 and a logic high on DIN2 will turn on switches 8 to 15. The bleed resistors help to significantly reduce voltage built up on capacitive loads such as piezoelectric transducers connected to the outputs. Using HVCMOS(R) technology, this device combines high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. Applications Medical ultrasound imaging Non-destructive evaluation Block Diagram VDD DIN 1 Latch 1 Level Translator 1 SW0 SW0 SW7 VDD DIN 2 LE GND VPP VNN SW7 SW8 Latch 2 Level Translator 2 SW8 SW15 SW15 RGND HV2731 Ordering Information 48-Lead LQFP Device HV2731 7x7mm body, 1.4mm height (min), 0.50mm pitch HV2731FG-G -G indicates package is RoHS compliant (`Green') Absolute Maximum Ratings Parameter VDD logic supply VPP-VNN differential supply VPP positive supply VNN negative supply Logic input voltage Analog signal range Peak analog signal current/channel Storage temperature Power dissipation Value -0.5V to +7.0V 225V -0.5V to VNN+225V +0.5V to -225V -0.5V to VDD +0.3V VNN to VPP 3.0A -65C to 150C 1.0W Pin Configuration 48 1 48-Lead LQFP (FG) (top view) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Product Marking Top Marking YYWW HV2731FG LLLLLLLLL Bottom Marking CCCCCCCC AAA YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking 48-Lead LQFP (FG) Recommended Operating Conditions Sym VDD VPP VNN VIH VIL VSIG TA Parameter Logic power supply voltage Positive driver supply Negative high voltage supply High level input voltage Low-level input voltage Analog signal voltage peak-to-peak Operating free air temperature Value 3.0V to 5.5V +50V to +110V -10V to VPP -220V VDD -1.0V to VDD 0V to 1.0V VNN +10V to VPP -10V 0OC to 70OC Notes: 1. Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2. VSIG must be VNN VSIG VPP or floating during power up/down transition. 3. Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec. 2 HV2731 DC Electrical Characteristics (Over recommended operating conditions unless otherwise specified ) Sym Parameter 0OC Min Max 30 25 15 20 20 5.0 300 500 3.0 8.1 -8.1 8.1 -8.1 10 2.0 10 Min 20 - +25OC Typ 26 22 22 18 5.0 15 35 1.0 100 100 10 -10 10 -10 3.0 - +70OC Max Min 32 27 27 22 20 50 10 300 500 50 -50 50 -50 2.0 50 8.8 -8.8 6.3 -6.3 10 2.0 10 Max 40 35 Units Conditions VSIG = 0V, ISIG = 5.0mA, VPP = +50V, VNN = -170V VSIG = 0V, ISIG = 200mA, VPP = +50V, VNN = -170V VSIG = 0V, ISIG = 5.0mA, VPP = +110V, VNN = -110V VSIG = 0V, ISIG = 200mA, VPP = +110V, VNN = -110V % K A mV VSIG = 0V, ISIG = 5.0mA, VPP = +110V, VNN = -110V VSIG = 0V, ISIG = 1.0A Output switch to RGND IRINT = 0.5mA VSIG = VPP -10V, VNN = +10V No load RONS Small signal switch on-resistance 30 25 20 15 300 500 2.0 10 -10 6.9 -6.9 10 2.0 10 mA A mA pF mA RONS RONL RINT ISOL Small signal switch on-resistance matching Large signal switch on-resistance Output switch shunt resistance Switch off-leakage per switch - VOS(OFF) DC offset switch off VOS(ON) DC offset switch on IPPQ INNQ IPPQ INNQ ISW fSW IPP INN IPP INN IDDQ IDD CIN Quiescent VPP supply current Quiescent VNN supply current Quiescent VPP supply current Quiescent VNN supply current Switch output peak current Output switching frequency Average VPP supply current Average VNN supply current Average VPP supply current Average VNN supply current Quiescent VDD supply current Average VDD supply current Logic input capacitance A All switches off All switches on, ISW = 5.0mA VSIG duty cycle < 0.1% Duty cycle = 50% VPP = 50V, VNN = -170V, All switches turning on and off at 50kHz VPP = 110V, VNN = -110V, All switches turning on and off at 50kHz All logic inputs are static DIN1 = DIN2 = 3.0MHz, LE = high --- A A kHz AC Electrical Characteristics (Over recommended operating conditions unless otherwise specified) Sym tWLE tWDIN tSD Parameter Time width of LE Time width of DIN Set up time before LE rises 0OC Min 150 150 150 Max Min 150 150 150 +25OC Typ Max +70OC Min 150 150 150 Max Units Conditions ns ns ns ------- 3 HV2731 AC Electrical Characteristics (cont.) (Over recommended operating conditions unless otherwise specified) Sym tON tOFF dv/dt KO KCR IID Parameter Turn on time Turn off time Maximum VSIG slew rate Off isolation Switch crosstalk Output switch isolation diode current 0OC Min -30 -45 -45 5.0 25 Max 5.0 5.0 20 300 17 50 Min -30 -45 -45 5.0 25 - +25OC Typ -33 -50 12 38 250 500 770 620 Max 5.0 5.0 20 300 17 50 - +70OC Min -30 -45 -45 5.0 25 Max 5.0 5.0 20 300 17 50 - Units Conditions VSIG = VPP -10V, RLOAD = 10K --f = 5.0MHz, load = 1.0K/15pF f = 7.5MHz, RLOAD = 50K dB mA pF pF mV f = 5.0MHz, RLOAD = 50K 300ns pulse width, 2.0% duty cycle VSIG = 0V, f = 1.0MHz VSIG = 0V, f = 1.0MHz RLOAD = 50 VPP = +50V, VNN = -170V VPP = +110V, VNN = -110V s V/ns dB CSG(OFF) Off capacitance SW to GND CSG(ON) On capacitance SW to GND +VSPK -VSPK QC Output voltage spike Charge injection PC Logic Timing Waveforms VDD DIN 0V VDD LE 0V ON SW OFF TON 10% 90% 50% tsd 50% 50% tWLE 50% TOFF Truth Table DIN2 L L H H X DIN1 L H L H X LE L L L L H SW0 to SW7 OFF ON OFF ON Hold Previous State SW8 to SW15 OFF OFF ON ON 4 HV2731 Test Circuits VPP-10V RL VPP-10V and VNN+10V VOUT RINT RINT 10K VOUT RINT RINT VOUT RINT RINT RGND RGND VDD GND 5.0V VPP VNN VPP VNN VDD GND 5.0V VPP VNN RGND VPP VNN VDD GND 5.0V VPP VNN VPP VNN ISOL = VOUT RINT DC Offset ON/OFF TON/TOFF Switch OFF Leakage VOUT VOUT VIN=10VP-P @ 5.0MHz RINT RINT RLOAD VIN=10VP-P @ 5.0MHz NC 50 RINT RINT 50 RGND RGND VDD GND 5.0V VPP VNN VPP VNN VDD GND 5.0V VPP VNN VPP VNN KO = 20Log VOUT VIN KCR = 20Log VOUT VIN Off Isolation Crosstalk VSIG IID VNN RINT RINT +VSPK VOUT VSIG 1K RINT RINT VOUT VOUT RINT RINT 50 -VSPK 1000pF RGND VPP VNN VPP VNN VDD GND 5.0V VPP VNN RGND RGND VPP VNN VDD GND 5.0V VPP VNN VPP VNN VDD GND 5.0V Isolation Diode Current Output Voltage Spike Q = 1000pF x VOUT Charge Injection 5 HV2731 Pin Configuration Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Function VNN N/C VPP N/C DIN1 LE DIN2 N/C N/C VDD GND N/C RGND SW15 SW15 SW14 SW14 SW13 SW13 SW12 SW12 SW11 SW11 N/C Pin 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Function SW10 SW10 SW9 SW9 SW8 SW8 SW7 SW7 SW6 SW6 SW5 SW5 SW4 N/C SW4 N/C SW3 SW3 SW2 SW2 SW1 SW1 SW0 SW0 6 HV2731 48-Lead LQFP Package Outline (FG) 7x7mm body, 1.4mm height (min), 0.50mm pitch D D1 E E1 Note 1 (Index Area D1/4 x E1/4) L2 48 1 b e L L1 Seating Plane Gauge Plane Top View View B A A2 Seating Plane A1 View B Side View Note 1: A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. Symbol MIN Dimension (mm) NOM MAX Drawings not to scale. A 1.40 1.60 A1 0.05 0.15 A2 1.35 1.40 1.45 b 0.17 0.22 0.27 D 8.80 9.00 9.20 D1 6.80 7.00 7.20 E 8.80 9.00 9.20 E1 6.80 7.00 7.20 e 0.50 BSC L 0.45 0.60 0.75 L1 1.00 REF L2 0.25 BSC 0O 3.5O 7O JEDEC Registration MS-026, Variation BBC, Issue D, Jan. 2001. (The package drawing (s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Doc.# DSFP-HV2731 NR020508 7 |
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